Proposal 1 Title: Annalyzing Different Networking Architectures on the Performace of Cluster Machines Abstract:
In a multi-processor machine, where processes are working together to solve a problem, some data is passed to and from each of the running processes to help with the sollution. Such machines are usually made up of a group of smaller machines, that are interconnected via some network. The smaller machines could be one processor machines or multi-processor machines netwroked via high speed shared memory. The small machines may have multiple networking options that may be all utilized in the making of a fast communicating cluster. Since communication seems to be the major bottleneck in the execution of most parallel applications, this study will aim to expose this bottle neck by trying new routing techniques and ones experimented with by previous researchers.
Proposal 2 Title: A thread-processor mapping scheme to increase fault tollerance in a multi-processor environment Abstract:
In real world applications, processors involved in the computation or gathering of data may be distributed accross a large area. Processors may lie in different countries in a large computation. Certein Processors may fail or return faulty data (Byzantine Generals Problem). The aim of this paper is to propose a method of duplicating and mapping processes (using techniques in mathematical design theory) to increase reliability of partial sollutions returned by computing nodes in a parallel application.